Overview
The Intel MD27C64-20 is a military-grade 65,536-bit (8,192 words by 8 bits) ultraviolet-erasable and electrically programmable read-only memory (EPROM) from Intel’s CHMOS family. The MD prefix designates the military-qualified version with a hermetic ceramic DIP package and extended temperature operation, while the -20 suffix specifies a maximum address access time of 200 ns. This device provides non-volatile code storage for microprocessor-based systems requiring fast read performance, field reprogrammability via UV light erasure (typically 15–30 minutes at 12,000 μW/cm²), and high reliability under harsh environmental conditions. It operates from a single 5 V supply in read and standby modes and uses a 12.5 V programming voltage (VPP) during write operations. The architecture employs advanced CHMOS II-E circuitry for low power consumption and high noise immunity, making it suitable for military, aerospace, industrial control, and legacy embedded applications.

Key Features
- 64 Kbit density organized as 8K × 8 bits.
- 200 ns maximum access time (address to output).
- Low power CHMOS technology: maximum 30 mA active ICC and 100 μA standby ICC.
- Fast byte programming: 100 μs typical per byte using Intel’s intelligent programming algorithm.
- Single +5 V ±10 % supply for read and standby operation.
- 12.5 V VPP for programming and program verification.
- TTL-compatible inputs and outputs with full 5 V logic levels.
- Military temperature range: –55 °C to +125 °C ambient.
- 10,000 program/erase cycles minimum endurance.
- Latch-up immunity and built-in ESD protection.
- Hermetic 28-pin ceramic DIP package (CDIP) for high-reliability mounting.
- JEDEC-standard pinout compatible with other 27C64 family members.

Functional Description
The MD27C64-20 functions as a fully static EPROM with no clock requirement. In read mode, the device outputs data when both chip enable (CE) and output enable (OE) are low and VPP is at 5 V. Address inputs A0–A12 select one of 8,192 locations, and the eight data outputs DQ0–DQ7 present the stored byte after the specified access time. Standby mode is entered by raising CE to high, reducing power to standby levels while maintaining data integrity. Programming is performed by applying 12.5 V to VPP, 5 V to VCC, the desired address and data, then pulsing CE low for 100 μs per byte (intelligent algorithm recommended for faster and more reliable programming). After programming, verification is accomplished by reading the array with VPP at 5 V. Erasure is achieved by exposing the quartz window to UV light, returning all bits to the erased state (all 1s). The device includes internal address latching and automatic program-pulse control in supported programmers. Break-before-make switching and internal pull-ups ensure clean operation across the full military temperature range.

Pin Configuration
The MD27C64-20 is housed in a 28-pin ceramic DIP (CDIP) package with the following pin assignments (standard JEDEC 27C64 pinout):
- Pin 1: VPP (programming voltage).
- Pins 2–13: A12, A7, A6, A5, A4, A3, A2, A1, A0, DQ0, DQ1, DQ2.
- Pin 14: GND.
- Pins 15–19: DQ3, DQ4, DQ5, DQ6, DQ7.
- Pin 20: CE (chip enable, active low).
- Pin 21: A10.
- Pin 22: OE (output enable, active low; also VPP in some older variants but separate on this device).
- Pin 23: A11.
- Pin 24–27: A9, A8, NC or A13 (not used), A13 (if extended).
- Pin 28: VCC (+5 V).
The ceramic package features a transparent quartz lid for UV erasure and provides hermetic sealing for military environmental protection. Pin spacing is 2.54 mm with gold-plated leads.

Truth Table / Operating Modes
- Read: CE = LOW, OE = LOW, VPP = 5 V → Data valid on DQ pins after tACC.
- Standby: CE = HIGH → Outputs high-impedance, low power.
- Output Disable: CE = LOW, OE = HIGH → Outputs high-impedance.
- Program: CE = LOW pulse, OE = HIGH, VPP = 12.5 V, address/data applied → Byte programmed.
- Program Verify: CE = LOW, OE = LOW, VPP = 5 V → Read programmed data.
- Erase (UV): All bits to 1s after exposure (VPP, CE, OE don’t care).
Don’t-care conditions apply to address pins during standby or program inhibit.

Absolute Maximum Ratings
Stresses beyond these limits may cause permanent damage (not guaranteed for functional operation):
- Supply voltage VCC: –0.5 V to +7.0 V.
- Programming voltage VPP: –0.5 V to +14.0 V.
- DC voltage on any pin (except VPP): –0.5 V to VCC + 0.5 V.
- Input/output current per pin: ±10 mA.
- Power dissipation: 1.0 W.
- Storage temperature: –65 °C to +150 °C.
- Ambient temperature with power applied: –55 °C to +125 °C.
- UV exposure for erase: maximum 1 W·s/cm² recommended.

Recommended Operating Conditions
- Supply voltage VCC: 4.5 V to 5.5 V.
- Programming supply VPP: 12.0 V to 13.0 V (12.5 V nominal).
- Operating ambient temperature (military): –55 °C to +125 °C.
- Input rise/fall times: maximum 20 ns/V.

DC Electrical Characteristics
Parameters specified over VCC = 4.5 V to 5.5 V, TA = –55 °C to +125 °C:
- Input low voltage (VIL): maximum 0.8 V.
- Input high voltage (VIH): minimum 2.0 V.
- Output low voltage (VOL): maximum 0.45 V at IOL = 2.1 mA.
- Output high voltage (VOH): minimum 2.4 V at IOH = –400 μA.
- Input leakage current (IIL/IIH): maximum ±1 μA.
- Output leakage current (IOZ): maximum ±10 μA.
- Active supply current (ICC1): maximum 30 mA (CE = OE = LOW).
- Standby supply current (ICC2): maximum 100 μA (CE = HIGH).
- VPP supply current during program (IPP): maximum 30 mA.
- VPP read current (IPP read): maximum 100 μA (VPP = 5 V).

AC Electrical Characteristics
Test conditions: VCC = 5 V ±10 %, TA = –55 °C to +125 °C, CL = 100 pF, output load 1 TTL gate + 100 pF:
- Address access time (tACC): maximum 200 ns.
- Chip enable access time (tCE): maximum 200 ns.
- Output enable access time (tOE): maximum 75 ns.
- Output float time after OE high (tDF): maximum 60 ns.
- Output valid after CE or OE (tCF or tOF): minimum 0 ns.
- Chip enable to output active (tCE to valid): maximum 200 ns.
All timing parameters are guaranteed over the full military temperature and voltage range for the -20 speed grade.

Programming and Erase Characteristics
- Programming pulse width: 100 μs minimum per byte (intelligent algorithm).
- Programming voltage VPP: 12.5 V ±0.5 V.
- Program verify time: 100 μs typical.
- UV erase time: 15–30 minutes at 12 mW/cm² (2537 Å wavelength).
- Minimum number of program/erase cycles: 10,000.
- Data retention: 10 years minimum at 125 °C.

Package Information
The MD27C64-20 uses a 28-pin hermetic ceramic dual-in-line package (CDIP) with a transparent quartz window for UV erasure. Body dimensions are approximately 36.0 mm × 15.2 mm, with 2.54 mm pin pitch and gold-plated Kovar leads for military reliability. The package is moisture-sealed and meets MIL-STD-883 screening for Class B or equivalent. Marking includes the Intel logo, part number MD27C64-20, and date code.

Applications and Usage Considerations
This EPROM is ideal for military and high-reliability systems such as avionics firmware, missile guidance, industrial controllers, and legacy microprocessor code storage where UV reprogramming is acceptable. The 200 ns access time supports 8–12 MHz microprocessor operation without wait states. Recommended programming uses Intel-approved programmers with the intelligent algorithm to minimize overstress. For board layout, decouple VCC with 0.1 μF ceramic capacitors near the device, keep address and data lines short to minimize capacitance, and provide proper UV window cover during normal operation to prevent accidental erasure. The military temperature rating and hermetic package ensure operation under extreme vibration, humidity, and thermal cycling per MIL-STD-883. Although the part is obsolete in new production, it remains supported through authorized distributors and Rochester Electronics for legacy and maintenance programs. The MD27C64-20 delivers proven, high-reliability non-volatile storage with industry-standard compatibility and robust performance margins.